1. Field of the Invention
This invention relates to a method for growing a Group III atomic layer, more particularly to a method for growing a Group III atomic monolayer that is exactly one atom thick on a prescribed portion of a substrate, thereby opening the way to atomically controlled fabrication of the quantum wires, quantum boxes and other semiconductor quantum nanostructures which are viewed as basic structures for next-generation, high-performance optical devices and electronic devices.
2. Description of the Prior Art
The ever-increasing discreteness of energy levels and intensification of density of states resulting from increasingly smaller semiconductor microstructures point to the theoretical possibility of the appearance of various new quantum phenomena in small dimension semiconductor nanostructures. For example, it has been predicted that ultra-high speed field effect transistors will be realized by markedly suppressing the various electron scattering processes in quantum wires and that the oscillation threshold current temperature and its dependence of semiconductor lasers will be reduced by utilizing quantum wires and quantum boxes as the active layers. Researchers around the world are in fact actively exploring small-dimension semiconductor quantum nanostructures because they believe them to be indispensable to the building of the next generation of large-capacity, ultra-high speed information and communication systems.
To enable these and other quantum phenomena, the low-dimension quantum nanostructure should preferably satisfy the following conditions:
(1) Small Quantum Structure Size:
Pronounced quantum mechanical phenomena arise in small-sized semiconductor quantum nanostructures only when the energy difference between the first and second quantum energy levels of the structures is much larger than the electron thermal energy kT (k: Boltzmann constant, T: absolute temperature). In the case of AlGaAs/GaAs, for example, a structure with dimensions not exceeding 15 nm is required to satisfy this condition at room temperature.
(2) High Density
When quantum wires are used as conducting channels, for example, the amount of electric current passing through a single quantum wire is limited due to the single electron mode nature of quantum wires. Therefore, to obtain enough current to drive the following stage, circuit, it is necessary to increase the wire density and use multiple paths in parallel. Similarly, in the case of configuring a semiconductor laser using a quantum nanostructure as the active layer, it becomes necessary to increase the quantum nanostructure density in order to enhance the light confinement coefficient.
(3) High Uniformity
In all quantum nanostructure, quantum effects can be attributed to intensified density of states. However, maintaining the state intensification requires quantum nanostructures of consistent size. To ensure adequate quantum effects, the quantum nanostructure size fluctuation generally has to be held to under around 10%.
(4) High Quality
Securement of a high degree of electron migration and high light emission efficiency requires a high-quality quantum nanostructure without defects.
Various methods for satisfying these conditions have been proposed regarding the fabrication of quantum wires, quantum boxes and sundry other semiconductor quantum nanostructures. These include, for example, the method of directly processing two-dimensional structures using electron beam lithography and etching techniques, the method of selective growth on a non-planar substrate by metal-organic chemical vapor deposition (MOCVD) and molecular beam epitaxy (MBE) etc., as well as self-organization growth methods and the like. Among these, MOCVD selective growth is viewed as a particularly promising technology for its ability to fabricate defect-free quantum nanostructures by enabling their formation in the course of crystal growth.
Since this method requires a growth temperature of higher than around 700.degree. C. to achieve high selectivity, however, it is still inadequate on a number of points regarding the size, uniformity and crystal purity of the quantum nanostructures obtained.
Previously, before the accomplishment of this invention, the inventors proposed a method for fabrication of AlGaAs/GaAs quantum wires by use of flow rate modulation epitaxy (FME) FEM is basically a method in which Group III materials and Group V materials are supplied alternately. Taking Ga and As as examples of Group III and V atoms, each growth cycle consists of four gas supply periods as shown in FIG. 2: a Ga supply period t1, an H.sub.2 purge period t2, an As supply period t3 and an H.sub.2 purge period t4. (Ga can be supplied using triethylgallium (TEGa) and As using AsH.sub.3, for example.) This cycle is repeated a prescribed number of times. As indicated by bias flow Ro, a small amount of As (an amount not causing crystal growth) is supplied continuously even during the Ga supply period t1 and the H.sub.2 purge periods t2 and t4. Owing to the extremely low arsenic partial pressure during the Ga supply period, the surface migration of Ga atoms is promoted, particularly at tow temperatures. The supply of the small amount of AsH.sub.3 also suppresses desorption of As atoms from the substrate surface during the periods t1, t2 and t4 and prevents invasion of impurities. Crystal of extremely high quality can therefore be grown.
However, FME fundamentally lacks a self-limiting mechanism when it is applied to a flat substrate with uniform physical properties. Therefore, if atoms in an amount greater than that which causes growth of a single atomic layer (an atomic monolayer) are supplied (i.e., when the thickness of the film to be grown during each growth cycle is set greater than an atomic monolayer), the excess atoms form droplets on the surface. This degrades the crystal quality. Conventionally, therefore, it has been important to hold the growth rate to less than one atomic monolayer, generally to less than 0.7-0.9 atomic layer. In light of this conventional practice, the quantum wire fabrication proposed earlier by the inventors limits the growth rate to not more than 0.9 atomic layer per growth cycle. When this method was used to grow AlGaAs/GaAs quantum wires in V-grooves formed in a substrate, fairly good results were obtained as regards reducing the lateral width and improving the crystal quality of the fabricated quantum wires.
Thus, thanks to the application of FME, quantum nanostructures can be viewed as having reached a practically utilizable level in terms of size and crystal quality. Nevertheless, their density and uniformity still fall far short of practical requirements and stand as a major obstacle to the realization of high performance devices. Moreover, since there is a tradeoff between density and uniformity in quantum nanostructures, improvement in both aspects has been extremely difficult with conventional technologies. For example, while sufficiently high density can be achieved by use of advanced technologies such as electron beam lithograph, structures that are uniform on the atomic level are extremely difficult to achieve by etching in accordance with the exposed pattern. Since the conventional etching and lithograph are not atomically controlled processes. The size fluctuation is therefore considerable. Generally, when the substrate pattern size falls below around 1 .mu.m and becomes smaller than the material migration length on the substrate surface, the effect of the substrate size fluctuation on the crystal growth process becomes pronounced, in the end causing large fluctuation in the size of the quantum nanostructures.
A need is thus felt for a crystal growth method capable of fabricating practicable quantum nanostructures--a method that is substantially unaffected by substrate pattern fluctuation and capable of atomic layer level control. This invention was accomplished to meet this need, which is not satisfied by any technology proposed heretofore. The object of this invention is therefore to provide a new method suitable for forming quantum nanostructures including at least a Group III atomic layer which is little affected by substrate pattern density, tolerates size fluctuation to a high degree, and enables Group III atomic layers to be formed properly only as monolayers.